BittWare Announces XUPVV4 PCIe Board with Xilinx UltraScale+ VU13P FPGA

NEARLY 50% MORE FPGA LOGIC ELEMENTS WITH THERMAL CHALLENGE MET BY VIPER PLATFORM AND “LIDLESS” PACKAGE ISC Show, Frankfurt, Germany - The Xilinx UltraScale+ VU13P FPGA gives designers incredible performance potential, with nearly 50% more logic than the VU9P—yet with a power density that makes thermal management difficult. BittWare has met this challenge with the XUPVV4 FPGA PCIe board based on its new Viper platform, offering 3.8M FPGA logic elements, up to 512 Gbytes DDR4, and 4x 100 Gbps Ethernet. BittWare introduced this board at the ISC 2017 show in Frankfurt, booth A-1431. “Demand continues to grow for ever-larger FPGAs,” said Ron Huizen, Vice-President of Products at BittWare. “However, a turning point has been reached in which advanced power delivery and cooling is required to run these larger devices in servers. We are pleased to address this demand and challenge by implementing Xilinx’s innovative lidless VU13P on our new Viper platform.” While BittWare’s XUPP3R PCIe board with a VU9P FPGA is in high demand today, many users’ applications would benefit from even more logic elements (LEs) such as found on the VU13P. The challenge is that such an increase in LEs (2.6M to 3.8M) means a typical load would generate more heat than the traditional thermal design could handle in a server. With the trend for very large FPGAs only getting stronger, BittWare has created the Viper platform to handle these FPGAs on full-height, dual slot boards like the new XUPVV4 that can operate in a typical high-density server with passive cooling on the board. Viper Platform and Lidless Package The Viper platform uses advanced computer flow simulation to drive the physical board design in a “thermals first” approach, including the use of heat pipes, airflow channels, and arranging components to maximize the limited available airflow in a server. Viper boards are passive by default, with active cooling as an option. In addition, the XUPVV4 features a new D2104 “lidless” package from Xilinx—allowing the heat pipes to contact the die directly, instead of through the heat spreader “lid.” The XUPVV4 brings all the features of the popular XUPP3R, including 4x 100GbE and a PCIe Gen3 x16 interface. Memory options include up to 512 Gbytes DDR4 or 288 Mbytes QDR-II+ (4 DIMMs supporting a mix of DDR4 and QDR). Serial expansion is now through two UltraPort SlimSAS connectors (16x 24Gbps) that can be connected to a second PCIe interface, another XUPVV4, or other devices. The innovative XUPVV4 brings together the new Viper platform for efficient cooling of very large FPGAs along with the performance of the Xilinx UltraScale+ VU13P FPGA. Visit the product page for details.

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